Title: Hardware Synthesis of Parallel Data-Flow Systems
Time：     10:00-11:00, October24 Thursay,2019
Location:   Room 201, Mathematical Building
Lecturer：Patrice Quinton（ENS Rennes） 

Abstract:
The design of parallel algorithms for hardware accelerators requires transformations to be done on the initial algorithm description, usually given in the form of loops in an imperative language. We consider data-flow applications involving parallel calculations for each flow element. We show how we can represent these calculations as recurrence equations, through the use of a specialized function language called Alpha. Transformations of Alpha programs lead to parallel implementations that can be translated to a hardware description language such as Vhdl. We illustrate these notions with the MMAlpha software tool developed at IRISA.

Introduction of Lectuer:
Patrice Quinton is professor emeritus at ENS Rennes, France. He graduated from ENSIMAG (Grenoble) in 1972, obtained a PhD in the University of Rennes 1 in 1980. He was successively researcher at the CNRS in Rennes, then Professor at the University of Rennes 1, and Professor at ENS Rennes. He was President of ENS Rennes from 2014 to 2015. His research interest are Computer architecture and parallel architectures.